IP PortfolioInterface PHYs

Interface PHYs (mixed-signal)

Physical layers: SerDes, memory PHYs, USB/PCIe/MIPI/HDMI PHYs, GPIO and LVDS, optical and III-V (GaAs/InP) high-speed PHYs. All need silicon proof.

Blocks 105Implemented 0Families 18III-V process 22 · ASIC (CMOS) only 83

serdes 6 pcie_phy 6 usb_phy 6 memory_phy 12 memory_buffer 2 mipi_phy 6 display_phy 7 ethernet_phy 11 lvds_io 6 line_xcvr 5 die_to_die_phy 6 converter_phy 1 storage_phy 2 optical_phy 7 iii_v_optical 12 iii_v_electrical 5 optical 3 high_speed 2

serdes

6 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_serdes_12g	Multi-protocol SerDes up to 12.5 Gb/s	planned	ASIC (CMOS) only	Hard
of_serdes_32g	Multi-protocol SerDes up to 32 Gb/s NRZ	planned	ASIC (CMOS) only	Very hard
of_serdes_56g_pam4	56 Gb/s PAM4 SerDes	planned	ASIC (CMOS) only	Very hard
of_serdes_112g_lr	112 Gb/s PAM4 long-reach SerDes	planned	ASIC (CMOS) only	Very hard
of_serdes_112g_xsr	112 Gb/s XSR/VSR SerDes	planned	ASIC (CMOS) only	Very hard
of_serdes_224g	224 Gb/s PAM4 SerDes	planned	ASIC (CMOS) only	Very hard

pcie_phy

6 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_pcie_g3_phy	PCIe Gen3 PHY	planned	ASIC (CMOS) only	Very hard
of_pcie_g4_phy	PCIe Gen4 PHY	planned	ASIC (CMOS) only	Very hard
of_pcie_g5_phy	PCIe Gen5 PHY	planned	ASIC (CMOS) only	Very hard
of_pcie_g6_phy	PCIe Gen6 PHY	planned	ASIC (CMOS) only	Very hard
of_pcie_g7_phy	PCIe Gen7 PHY	planned	ASIC (CMOS) only	Very hard
of_pcie_retimer	PCIe/CXL retimer	planned	ASIC (CMOS) only	Very hard

usb_phy

6 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_usb_fs_xcvr	USB full-speed transceiver	planned	ASIC (CMOS) only	Medium
of_usb2_phy	USB 2.0 PHY (UTMI+)	planned	ASIC (CMOS) only	Hard
of_eusb2_phy	eUSB2 PHY	planned	ASIC (CMOS) only	Hard
of_usb3_phy	USB 3.2 PHY	planned	ASIC (CMOS) only	Hard
of_usb4_phy	USB4 PHY	planned	ASIC (CMOS) only	Very hard
of_typec_combo_phy	USB-C combo PHY (USB 3.2 + DisplayPort)	planned	ASIC (CMOS) only	Very hard

memory_phy

12 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_ddr4_phy	DDR3/DDR4 PHY	planned	ASIC (CMOS) only	Hard
of_ddr5_phy	DDR5 PHY	planned	ASIC (CMOS) only	Very hard
of_lpddr4_phy	LPDDR4/LPDDR4X PHY	planned	ASIC (CMOS) only	Very hard
of_lpddr5_phy	LPDDR5/LPDDR5X PHY	planned	ASIC (CMOS) only	Very hard
of_lpddr6_phy	LPDDR6 PHY	planned	ASIC (CMOS) only	Very hard
of_gddr6_phy	GDDR6 PHY	planned	ASIC (CMOS) only	Very hard
of_gddr7_phy	GDDR7 PHY	planned	ASIC (CMOS) only	Very hard
of_hbm2e_phy	HBM2E PHY	planned	ASIC (CMOS) only	Very hard
of_hbm3_phy	HBM3/HBM3E PHY	planned	ASIC (CMOS) only	Very hard
of_hbm4_phy	HBM4 PHY	planned	ASIC (CMOS) only	Very hard
of_onfi_phy	ONFI / Toggle NAND PHY	planned	ASIC (CMOS) only	Hard
of_xspi_phy	xSPI / Octal DDR PHY	planned	ASIC (CMOS) only	Hard

memory_buffer

2 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_ddr5_rcd	DDR5 registering clock driver	planned	ASIC (CMOS) only	Very hard
of_ddr5_db	DDR5 data buffer	planned	ASIC (CMOS) only	Very hard

mipi_phy

6 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_mipi_dphy	MIPI D-PHY	planned	ASIC (CMOS) only	Hard
of_mipi_cphy	MIPI C-PHY	planned	ASIC (CMOS) only	Very hard
of_mipi_dcphy	MIPI D-PHY/C-PHY combo	planned	ASIC (CMOS) only	Very hard
of_mipi_mphy	MIPI M-PHY	planned	ASIC (CMOS) only	Very hard
of_mipi_aphy	MIPI A-PHY	planned	ASIC (CMOS) only	Very hard
of_slvs_ec_phy	SLVS-EC receiver PHY	planned	ASIC (CMOS) only	Hard

display_phy

7 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_hdmi20_tx_phy	HDMI 2.0 TMDS transmitter PHY	planned	ASIC (CMOS) only	Hard
of_hdmi21_tx_phy	HDMI 2.1 transmitter PHY	planned	ASIC (CMOS) only	Very hard
of_hdmi21_rx_phy	HDMI 2.1 receiver PHY	planned	ASIC (CMOS) only	Very hard
of_dp14_tx_phy	DisplayPort 1.4 / eDP transmitter PHY	planned	ASIC (CMOS) only	Hard
of_dp21_tx_phy	DisplayPort 2.1 transmitter PHY	planned	ASIC (CMOS) only	Very hard
of_dp_rx_phy	DisplayPort receiver PHY	planned	ASIC (CMOS) only	Very hard
of_vbyone_phy	V-by-One HS transmitter PHY	planned	ASIC (CMOS) only	Hard

ethernet_phy

11 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_eth_phy_100base_tx	10/100BASE-TX Ethernet PHY	planned	ASIC (CMOS) only	Hard
of_eth_phy_1000base_t	10/100/1000BASE-T Ethernet PHY	planned	ASIC (CMOS) only	Very hard
of_eth_phy_nbase_t	2.5G/5GBASE-T Ethernet PHY	planned	ASIC (CMOS) only	Very hard
of_eth_phy_10gbase_t	10GBASE-T Ethernet PHY	planned	ASIC (CMOS) only	Very hard
of_eth_phy_100base_t1	100BASE-T1 automotive Ethernet PHY	planned	ASIC (CMOS) only	Hard
of_eth_phy_1000base_t1	1000BASE-T1 automotive Ethernet PHY	planned	ASIC (CMOS) only	Very hard
of_eth_phy_mgig_t1	2.5G/5G/10GBASE-T1 automotive PHY	planned	ASIC (CMOS) only	Very hard
of_eth_phy_10base_t1s	10BASE-T1S multidrop PHY	planned	ASIC (CMOS) only	Hard
of_eth_phy_10base_t1l	10BASE-T1L long-reach PHY	planned	ASIC (CMOS) only	Hard
of_eth_phy_10gbase_kr	10GBASE-KR backplane PHY	planned	ASIC (CMOS) only	Hard
of_eth_gearbox_112g	112G Ethernet retimer/gearbox	planned	ASIC (CMOS) only	Very hard

lvds_io

6 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_lvds_serdes	Source-synchronous LVDS SerDes	planned	ASIC (CMOS) only	Hard
of_slvs400_io	SLVS-400 I/O	planned	ASIC (CMOS) only	Hard
of_sublvds_rx	Sub-LVDS receiver	planned	ASIC (CMOS) only	Hard
of_mlvds_io	M-LVDS multipoint transceiver	planned	ASIC (CMOS) only	Medium
of_fpdlink_tx_phy	7:1 LVDS display serializer PHY	planned	ASIC (CMOS) only	Hard
of_sgmii_lvds_phy	SGMII over LVDS PHY	planned	ASIC (CMOS) only	Hard

line_xcvr

5 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_can_xcvr	CAN / CAN FD transceiver	planned	ASIC (CMOS) only	Hard
of_lin_xcvr	LIN transceiver	planned	ASIC (CMOS) only	Medium
of_rs485_xcvr	RS-485 transceiver	planned	ASIC (CMOS) only	Medium
of_mil1553_xcvr	MIL-STD-1553 bus transceiver	planned	ASIC (CMOS) only	Hard
of_arinc429_xcvr	ARINC 429 line driver and receiver	planned	ASIC (CMOS) only	Medium

die_to_die_phy

6 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_ucie_phy_std	UCIe standard-package PHY	planned	ASIC (CMOS) only	Very hard
of_ucie_phy_adv	UCIe advanced-package PHY	planned	ASIC (CMOS) only	Very hard
of_bow_phy	BoW die-to-die PHY	planned	ASIC (CMOS) only	Hard
of_aib_phy	AIB PHY	planned	ASIC (CMOS) only	Hard
of_openhbi_phy	OpenHBI PHY	planned	ASIC (CMOS) only	Hard
of_d2d_xsr_serdes	112G XSR die-to-die SerDes	planned	ASIC (CMOS) only	Very hard

converter_phy

1 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_jesd204c_phy	JESD204C SerDes PHY	planned	ASIC (CMOS) only	Very hard

storage_phy

2 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_sata_phy	SATA 6 Gb/s PHY	planned	ASIC (CMOS) only	Hard
of_sas_phy	SAS 24G PHY	planned	ASIC (CMOS) only	Very hard

optical_phy

7 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_vcsel_driver	VCSEL driver array	planned	ASIC (CMOS) only	Very hard
of_pd_tia	Photodiode TIA array	planned	ASIC (CMOS) only	Very hard
of_sipho_mod_driver	Silicon photonics modulator driver	planned	ASIC (CMOS) only	Very hard
of_ring_tuning_ctrl	Micro-ring resonance tuning controller	planned	ASIC (CMOS) only	Hard
of_cpo_engine_if	Co-packaged optics electrical interface	planned	ASIC (CMOS) only	Very hard
of_lpo_linear_frontend	Linear pluggable optics driver and TIA	planned	ASIC (CMOS) only	Very hard
of_pam4_optical_dsp	PAM4 optical module DSP PHY	planned	ASIC (CMOS) only	Very hard

iii_v_optical

12 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_inp_eml_tx	InP EML transmitter	planned	III-V process	Very hard
of_inp_dml_tx	InP directly modulated laser transmitter	planned	III-V process	Hard
of_inp_mzm_tx	InP Mach-Zehnder modulator transmitter	planned	III-V process	Very hard
of_inp_hbcdm	InP coherent driver-modulator (HB-CDM)	planned	III-V process	Very hard
of_inp_icr	InP integrated coherent receiver	planned	III-V process	Very hard
of_inp_itla	InP tunable laser assembly (ITLA)	planned	III-V process	Very hard
of_inp_wgpd_array	InP waveguide photodiode array	planned	III-V process	Very hard
of_inp_apd_rx	InP APD receiver	planned	III-V process	Very hard
of_gaas_vcsel_tx	GaAs VCSEL array transmitter	planned	III-V process	Hard
of_inp_soa	InP semiconductor optical amplifier	planned	III-V process	Hard
of_inp_elsfp	InP external laser source for co-packaged optics	planned	III-V process	Very hard
of_gaas_pd_rx	GaAs photodiode receiver	planned	III-V process	Hard

iii_v_electrical

5 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_inp_hbt_tia	InP HBT linear TIA	planned	III-V process	Very hard
of_inp_hbt_driver	InP HBT linear modulator driver	planned	III-V process	Very hard
of_gaas_phemt_driver	GaAs pHEMT modulator driver	planned	III-V process	Hard
of_iii_v_laser_driver	GaAs/InP laser driver	planned	III-V process	Hard
of_inp_hbt_redriver	InP HBT linear redriver	planned	III-V process	Very hard

optical

3 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_inp_wavelength_locker	InP on-chip wavelength locker	planned	III-V process	Hard
of_inp_wdm_demux	InP AWG and flat-top WDM demultiplexer	planned	III-V process	Hard
of_inp_oeo_repeater	InP optical-electrical-optical repeater PIC	planned	III-V process	Hard

high_speed

2 blocks · 0 implemented

ID	Block	Maturity	Targets	Difficulty
of_inp_hbt_mux_demux	InP DHBT 2:1 selector and 1:2 demultiplexer	planned	III-V process	Very hard
of_inp_hbt_cdr	InP DHBT clock and data recovery retimer	planned	III-V process	Very hard

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