IP PortfolioInterface PHYshigh_speed
of_inp_hbt_mux_demux
InP DHBT 2:1 selector and 1:2 demultiplexer
Maturity plannedTargets III-V processDifficulty Very hardPriority 2
Full-rate 2:1 selector and 1:2 demultiplexer in InP DHBT for serial rates of 200 Gbaud and above, used to build electrical time-division multiplexing ahead of optical modulators.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| din | in | differential pair | 2 | |
| dout | out | differential pair | 1 | |
| clk | in | differential pair | 1 |
Standards
No external standard applies.
More in high_speed
| ID | Block | Maturity |
|---|---|---|
| of_inp_hbt_cdr | InP DHBT clock and data recovery retimer | planned |