IP PortfolioQuantum controlqec

of_q_feedback_ctrl

Real-time feedback controller

Maturity plannedTargets FPGA + ASICDifficulty HardPriority 1

Mid-circuit measurement feedback that evaluates conditions on fresh results and triggers branches, active reset or corrections within the coherence budget.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAXI4-Lite control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request
meas_ininvalid-qualified bus64 
branch_outoutvalid-qualified bus16 

Standards

  • OpenQASM 3.0

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