IP PortfolioInterface controllerscan
of_canfd
CAN FD controller
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 1
CAN FD controller with bit-rate switching, 64-byte payloads, transmitter delay compensation, message RAM with filters and timestamping.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| can_tx | out | serial | 1 | |
| can_rx | in | serial | 1 |
Standards
- ISO 11898-1:2015