IP PortfolioInterface controllersspace_avionics
of_arinc429
ARINC 429 transceiver controller
Maturity plannedTargets FPGA + ASICDifficulty EasyPriority 2
ARINC 429 multi-channel transmitter and receiver with high/low speed, label filtering, parity and FIFO buffering.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| tx_hi_lo | out | parallel | 4 | |
| rx_hi_lo | in | parallel | 4 |
Standards
- ARINC 429
More in space_avionics
| ID | Block | Maturity |
|---|---|---|
| of_spacewire | SpaceWire codec and router port | planned |
| of_spacefibre | SpaceFibre interface | planned |
| of_mil1553 | MIL-STD-1553B controller | planned |
| of_afdx_es | AFDX (ARINC 664 Part 7) end system | planned |