IP PortfolioDatapath and DSPdsp signal processing

of_matched_filter

Matched filter and pulse compressor

Maturity plannedTargets FPGA + ASICDifficulty HardPriority 2

Frequency-domain or time-domain matched filtering against a loaded reference waveform (chirp, Barker, Frank codes) for radar and lidar pulse compression.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAPB control bus32Control and status registers, including ID, VERSION and STATUS
s_ininAXI4-Stream32 
m_outoutAXI4-Stream32 

Standards

No external standard applies.

More in dsp signal processing

IDBlockMaturity
of_cmulComplex multipliersimulated
of_mixerDigital complex mixerplanned
of_ddcDigital down-converterplanned
of_ducDigital up-converterplanned
of_correlatorMulti-lag correlatorplanned
of_agcDigital automatic gain controlplanned