Streaming pipelined FFT/IFFT

Maturity plannedTargets FPGA + ASICDifficulty HardPriority 1

Pipelined single-path delay feedback FFT and IFFT (radix-2, radix-2^2) with run-time size from 16 to 65536 points, natural or bit-reversed output and block floating point option.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

Port	Direction	Kind	Width	Notes
ctrl	in/out	APB control bus	32	Control and status registers, including ID, VERSION and STATUS
s_in	in	AXI4-Stream	32
m_out	out	AXI4-Stream	32

Standards

No external standard applies.

More in dsp transforms and oscillators

ID	Block	Maturity
of_fft_mem	Memory-based mixed-radix FFT	planned
of_cordic	CORDIC rotator and vectoring unit	fpga-routed
of_nco	NCO / direct digital synthesizer	simulated
of_window	Window function generator	planned
of_dct	2D DCT / IDCT	planned