IP PortfolioVerification IPmipi vip
of_vip_dsi_bfm
MIPI DSI bus functional model and agent
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 3
DSI host and display panel agents with video mode timing, command mode DCS read/write and bus turnaround.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| m_pix | out | AXI4-Stream | 64 | |
| s_pix | in | AXI4-Stream | 64 |
Standards
- MIPI DSI
More in mipi vip
| ID | Block | Maturity |
|---|---|---|
| of_vip_csi2_mon | MIPI CSI-2 monitor and protocol checker | planned |
| of_vip_csi2_bfm | MIPI CSI-2 camera model and agent | planned |
| of_vip_dsi_mon | MIPI DSI monitor and protocol checker | planned |
| of_vip_dphy_mon | MIPI D-PHY monitor and checker | planned |
| of_vip_cphy_mon | MIPI C-PHY monitor and checker | planned |