IP PortfolioSecurityattestation
of_sec_spdm
SPDM responder engine
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 1
SPDM message handling with certificate chain storage, measurement reporting and secured session key schedule, assisted by on-chip crypto.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
Standards
- DMTF DSP0274
- DMTF DSP0277
More in attestation
| ID | Block | Maturity |
|---|---|---|
| of_sec_dice | DICE identity engine | simulated |