IP PortfolioQuantum controlphotonic
of_q_qkd_postproc
QKD post-processing engine
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 2
Sifting, parameter estimation, LDPC information reconciliation and Toeplitz privacy amplification for quantum key distribution systems.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| raw_in | in | AXI4-Stream | 64 | |
| key_out | out | AXI4-Stream | 64 |
Standards
- ETSI GS QKD 014
More in photonic
| ID | Block | Maturity |
|---|---|---|
| of_q_snspd_readout | SNSPD readout front end | planned |
| of_q_spad_ctrl | SPAD gating and quench controller | planned |
| of_q_time_tagger | Multi-channel time tagger | planned |
| of_q_coincidence | Coincidence counter | simulated |
| of_q_tcspc_hist | TCSPC histogrammer | planned |
| of_q_feedforward | Feed-forward switch controller | planned |
| of_q_source_mux | Heralded source multiplexing controller | planned |
| of_q_pnr_analyser | Photon-number pulse analyser | planned |
| of_q_qrng_frontend | Quantum RNG readout and extractor | planned |
| of_q_mbqc_ctrl | Measurement-based computation controller | planned |