IP PortfolioVideo, imaging and audiographics_2d

of_mm_gfx_rotate

Image rotation and mirroring

Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2

Tiled 90, 180 and 270 degree rotation and horizontal and vertical flips for frame buffers.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAXI4-Lite control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request
srcinAXI4-Stream64 
dstoutAXI4-Stream64 

Standards

No external standard applies.

More in graphics_2d

IDBlockMaturity
of_mm_gfx_blitter2D blitterplanned
of_mm_gfx_alpha_blendAlpha blending engineplanned
of_mm_gfx_fontFont and glyph rendererplanned
of_mm_gfx_vector2D vector graphics rasterizerplanned
of_mm_gfx_fbcFrame buffer compressionplanned