IP PortfolioVideo, imaging and audioaudio_dsp
of_mm_aud_aec
Acoustic echo canceller
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 1
Frequency-domain adaptive filter with double-talk detection and residual echo suppression.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| mic | in | AXI4-Stream | 32 | |
| far_end | in | AXI4-Stream | 32 | |
| pcm_out | out | AXI4-Stream | 32 |
Standards
- ITU-T G.168
- ITU-T G.167
More in audio_dsp
| ID | Block | Maturity |
|---|---|---|
| of_mm_aud_src | Asynchronous sample rate converter | planned |
| of_mm_aud_eq | Parametric equaliser | planned |
| of_mm_aud_drc | Dynamic range compressor and limiter | planned |
| of_mm_aud_mic_bf | Microphone array beamformer | planned |
| of_mm_aud_ns | Noise suppression | planned |
| of_mm_aud_anc | Active noise cancellation | planned |
| of_mm_aud_kws_fe | Keyword spotting front end | planned |
| of_mm_aud_mixer | Audio mixer and router | planned |
| of_mm_aud_aac_dec | AAC decoder | planned |
| of_mm_aud_opus | Opus codec | planned |