IP PortfolioPhysical IPi/o pads
of_hybrid_bond_pad
Hybrid bonding pad library
Maturity plannedTargets ASIC (CMOS) onlyDifficulty Very hardPriority 2
Cu-Cu hybrid bonding pad cells, dummy pad fill and alignment keys for wafer-to-wafer and die-to-wafer 3D stacking.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
No external interfaces are defined for this entry yet.
Standards
No external standard applies.
Notes
Used for bonding III-V device tiers onto Si logic dies.
More in i/o pads
| ID | Block | Maturity |
|---|---|---|
| of_io_gpio | General-purpose I/O cell | planned |
| of_io_failsafe | Fail-safe and 5 V tolerant I/O | planned |
| of_io_od | Open-drain I2C / I3C I/O | planned |
| of_io_lvds | LVDS I/O cells | planned |
| of_io_cml | CML / LVPECL clock I/O | planned |
| of_io_sstl | SSTL / POD memory I/O cells | planned |
| of_io_analog | Analog pad | planned |
| of_io_rf | RF pad | planned |
| of_io_xtal | Crystal oscillator I/O cell | planned |
| of_io_power | Power and ground pads | planned |