IP PortfolioDatapath and DSPinteger arithmetic

of_pwl_func

Piecewise-linear function approximator

Maturity plannedTargets FPGA + ASICDifficulty EasyPriority 2

Table-driven piecewise-linear or quadratic interpolation of an arbitrary function (sigmoid, tanh, GELU, gamma curves) with run-time loadable breakpoints and coefficients.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAPB control bus32Control and status registers, including ID, VERSION and STATUS
xinAXI4-Stream16 
youtAXI4-Stream16 

Standards

No external standard applies.

More in integer arithmetic

IDBlockMaturity
of_add_rippleRipple-carry addersimulated
of_add_claCarry-lookahead addersimulated
of_add_cselCarry-select addersimulated
of_add_kogge_stoneKogge-Stone parallel-prefix adderfpga-routed
of_add_brent_kungBrent-Kung parallel-prefix addersimulated
of_add_sklanskySklansky parallel-prefix addersimulated
of_addsubAdder/subtractor with flagssimulated
of_incIncrementer / decrementersimulated
of_absAbsolute valuesimulated
of_cmpMagnitude comparatorsimulated