IP PortfolioDatapath and DSPinteger arithmetic

of_mac

Multiply-accumulate unit

Maturity simulatedTargets FPGA + ASICDifficulty MediumPriority 1

Single-cycle fused multiply-accumulate: the accumulator is injected into the partial-product tree so only one carry-propagate adder sits in the loop. acc <= acc + a*b, with clear/load.

Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.

Interfaces

PortDirectionKindWidthNotes
opndinvalid-qualified bus32 
accoutparallel48 

Standards

No external standard applies.

More in integer arithmetic

IDBlockMaturity
of_add_rippleRipple-carry addersimulated
of_add_claCarry-lookahead addersimulated
of_add_cselCarry-select addersimulated
of_add_kogge_stoneKogge-Stone parallel-prefix adderfpga-routed
of_add_brent_kungBrent-Kung parallel-prefix addersimulated
of_add_sklanskySklansky parallel-prefix addersimulated
of_addsubAdder/subtractor with flagssimulated
of_incIncrementer / decrementersimulated
of_absAbsolute valuesimulated
of_cmpMagnitude comparatorsimulated