IP PortfolioVerification IPautomotive bus vip
of_vip_can_bfm
CAN / CAN FD / CAN XL bus functional model and agent
Maturity simulatedTargets FPGA + ASICDifficulty MediumPriority 1
CAN node agent driving frames with arbitration, configurable bit timing, error frame and error-counter behavior and fault injection.
Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| can_tx | out | serial | 1 | |
| can_rx | in | serial | 1 |
Standards
- ISO 11898-1
- CiA 610-1
More in automotive bus vip
| ID | Block | Maturity |
|---|---|---|
| of_vip_can_mon | CAN / CAN FD / CAN XL monitor and protocol checker | simulated |
| of_vip_lin_mon | LIN monitor and protocol checker | planned |
| of_vip_lin_bfm | LIN bus functional model and agent | planned |
| of_vip_flexray_mon | FlexRay monitor and protocol checker | planned |
| of_vip_flexray_bfm | FlexRay bus functional model and agent | planned |