IP PortfolioSensing and RFradar
of_radar_doa_bf
Direction-of-arrival beamforming estimator
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 1
Angle FFT or Bartlett and Capon beam scans across the virtual array for each detection, with peak search for azimuth and elevation.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| snapshots | in | AXI4-Stream | 64 | |
| angles | out | AXI4-Stream | 32 |
Standards
No external standard applies.
More in radar
| ID | Block | Maturity |
|---|---|---|
| of_radar_fmcw_chirp_ctrl | FMCW chirp sequencer | simulated |
| of_radar_fe_24g | 24 GHz radar transceiver front end | planned |
| of_radar_fe_60g | 60 GHz radar transceiver front end | planned |
| of_radar_fe_77g | 76 to 81 GHz automotive radar front end | planned |
| of_radar_adc_frontend_dig | Radar IF digital front end | simulated |
| of_radar_range_fft | Range FFT engine | simulated |
| of_radar_doppler_fft | Doppler FFT engine | simulated |
| of_radar_cfar | CFAR detector (CA, OS, GO, SO) | simulated |
| of_radar_doa_subspace | Subspace DOA engine (MUSIC, ESPRIT) | planned |
| of_radar_mimo_va | MIMO virtual array processor | planned |