IP PortfolioSensing and RFinfrared
of_ir_thermal_isp
Thermal image processor
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2
Automatic gain control, histogram equalization, detail enhancement, temporal denoise and palette mapping for thermal video.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| corrected | in | AXI4-Stream | 16 | |
| video | out | AXI4-Stream | 24 |
Standards
No external standard applies.
More in infrared
| ID | Block | Maturity |
|---|---|---|
| of_ir_bolometer_roic | Microbolometer ROIC | planned |
| of_ir_ingaas_swir_roic | InGaAs SWIR ROIC | planned |
| of_ir_mwir_lwir_roic | MWIR/LWIR cooled ROIC | planned |
| of_ir_iiiv_ingaas_fpa | InGaAs photodiode focal plane array | planned |
| of_ir_iiiv_t2sl_fpa | Type-II superlattice infrared detector array | planned |
| of_ir_nuc | Non-uniformity correction engine | simulated |
| of_ir_radiometry | Radiometric temperature engine | planned |
| of_ir_gas_ndir | NDIR gas detection processor | planned |
| of_ir_ogi | Optical gas imaging processor | planned |