IP PortfolioQuantum controlcalibration

of_q_cal_sweep

Calibration sweep and fit engine

Maturity simulatedTargets FPGA + ASICDifficulty MediumPriority 1

Runs Rabi, Ramsey, T1, echo and spectroscopy sweeps on the controller and fits the results without host round trips.

Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAXI4-Lite control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request

Standards

No external standard applies.

More in calibration

IDBlockMaturity
of_q_mixer_calIQ mixer calibration engineplanned
of_q_readout_weightsReadout integration weight optimiserplanned
of_q_drift_trackerQubit parameter drift trackerplanned
of_q_crosstalk_compCrosstalk compensation matrixplanned
of_q_rb_engineRandomised benchmarking sequence engineplanned
of_q_error_mitigationReadout error mitigation engineplanned