of_cpu_radhard_rv32
Radiation-tolerant RV32 core
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 2
RV32IMC core with triple modular redundancy on state, EDAC on memories, scrubbing and single-event upset reporting for space and high-reliability systems.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ext_irq | in | parallel | 32 | |
| seu_evt | out | parallel | 4 |
Standards
- RISC-V RV32IMC
- DO-254
Notes
Instruction and data memory ports (AXI4, AHB or OBI) are master interfaces and are added when the skeleton is promoted; the catalog lists only interrupt and debug pins.
More in radhard
| ID | Block | Maturity |
|---|---|---|
| of_cpu_radhard_rv64 | Radiation-tolerant RV64 core | planned |
| of_cpu_radhard_obc | Spacecraft on-board computer subsystem | planned |
| of_cpu_mem_scrubber | Memory EDAC scrubber | planned |