IP PortfolioPhysical IPiii-v passives, interconnect and test
of_iiiv_tlines
Transmission line library
Maturity plannedTargets III-V processDifficulty MediumPriority 1
Microstrip and coplanar waveguide lines, bends, tees, tapers and couplers with substrate-specific models for MMIC layout.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| p1 | inout | RF | 1 | |
| p2 | inout | RF | 1 |
Standards
No external standard applies.
Notes
Dyber, Inc. in-house GaAs and InP process; device models and rules come from the dyber_iiiv PDK and run-1 measurements.
More in iii-v passives, interconnect and test
| ID | Block | Maturity |
|---|---|---|
| of_iiiv_passives | III-V MMIC passive library | planned |
| of_iiiv_tsv | Through-substrate via and backside cells | planned |
| of_iiiv_rf_pads | III-V RF probe and bond pads | planned |
| of_iiiv_pcm | III-V process control monitor set | planned |
| of_iiiv_seal_ring | III-V seal ring and scribe set | planned |