IP PortfolioAnalog and mixed-signalpower_management
of_ams_usbpd_phy
USB Power Delivery BMC PHY
Maturity plannedTargets ASIC (CMOS) onlyDifficulty HardPriority 2
CC-line biphase mark code transceiver with Rp/Rd termination and VCONN switch for USB Type-C power negotiation.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| cc | inout | analog | 2 | |
| rxbits | out | valid-qualified bus | 8 | |
| txbits | in | valid-qualified bus | 8 |
Standards
- USB Power Delivery 3.1
- USB Type-C 2.2
More in power_management
| ID | Block | Maturity |
|---|---|---|
| of_ams_ldo | General-purpose LDO regulator | planned |
| of_ams_ldo_capless | Capacitor-less LDO | planned |
| of_ams_ldo_lownoise | Low-noise LDO for RF and clock supplies | planned |
| of_ams_ldo_digital | Digital LDO | planned |
| of_ams_ldo_hv | High-voltage input LDO | planned |
| of_ams_buck | Synchronous buck converter | planned |
| of_ams_buck_multiphase | Multiphase buck controller | planned |
| of_ams_boost | Boost converter | planned |
| of_ams_buck_boost | Four-switch buck-boost converter | planned |
| of_ams_dcdc_sc | Switched-capacitor DC-DC converter | planned |